The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2026

Filed:

Aug. 16, 2021
Applicant:

Infineon Technologies Austria Ag, Villach, AT;

Inventors:

Kirill Trunov, Warstein, DE;

Alexander Heinrich, Bad Abbach, DE;

Konrad Roesl, Teublitz, DE;

Arthur Unrau, Geseke, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 72/00 (2026.01); B23K 1/00 (2006.01); B23K 20/02 (2006.01); H10W 72/20 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 72/0198 (2026.01); B23K 1/0016 (2013.01); B23K 20/026 (2013.01); H10W 72/07255 (2026.01); H10W 72/2528 (2026.01); H10W 90/00 (2026.01); H10W 72/07331 (2026.01); H10W 72/07334 (2026.01); H10W 72/07336 (2026.01); H10W 72/07636 (2026.01);
Abstract

An electronic device includes: a first semiconductor die having a metal region; a substrate having a plurality of metal regions; a first soldered joint between the metal region of the first semiconductor die and a first metal region of the substrate, the first soldered joint having one or more intermetallic phases throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the first semiconductor die and the first metal region of the substrate; and a second semiconductor die soldered to the first or different metal region of the substrate.


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