The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2026

Filed:

Sep. 17, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Kyle Mcelhinny, Tempe, AZ (US);

Haobo Chen, Gilbert, AZ (US);

Hongxia Feng, Chandler, AZ (US);

Xiaoying Guo, Chandler, AZ (US);

Leonel Arana, Phoenix, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 70/65 (2026.01); H10W 70/05 (2026.01); H10W 70/60 (2026.01); H10W 70/63 (2026.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01); H10W 72/20 (2026.01);
U.S. Cl.
CPC ...
H10W 70/65 (2026.01); H10W 70/093 (2026.01); H10W 70/611 (2026.01); H10W 70/635 (2026.01); H10W 90/00 (2026.01); H10W 90/701 (2026.01); H10W 72/07252 (2026.01); H10W 72/221 (2026.01);
Abstract

Embodiments disclosed herein include electronic packages. In an embodiment, the electronic package comprises a package substrate, and a first pad over the package substrate. In an embodiment, a layer is over the package substrate, where the layer is an insulating material. In an embodiment, the electronic package further comprises a via through the layer and in contact with the first pad. In an embodiment a first end of the via has a first width and a second end of the via that is in contact with the first pad has a second width that is larger than the first width. In an embodiment, the electronic package further comprises a second pad over the via.


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