The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2026
Filed:
Dec. 02, 2021
Intel Corporation, Santa Clara, CA (US);
Harald Gossner, Riemerling, DE;
Georgios Panagopoulos, Munich, DE;
Johannes Xaver Rauh, Kirchseeon, DE;
Richard Geiger, Munich, DE;
Intel Corporation, Santa Clara, CA (US);
Abstract
IC structures including BPRs used for ESD ballasting are disclosed. An IC structure includes semiconductor structures of one or more transistors. A semiconductor structure may be a fin, nanowire, or nanoribbon of a semiconductor material. The IC structure also includes an electrically conductive layer coupled to the semiconductor structures, a power rail, and a support structure. The power rail is coupled to the electrically conductive layer by a via. The power rail is buried in a support structure. The combination of the power rail and the via constitutes a ESD ballasting resistor for the semiconductor structures. A resistance of the ESD ballasting resistor can be in a range from 5 to 20 ohms. The IC structure may include two or more power rails. A power rail may be arranged between two of the semiconductor structures. The power rails may form a meander structure with other components of the IC structure.