The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2026
Filed:
Apr. 17, 2022
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Ruilong Xie, Niskayuna, NY (US);
Albert M Chu, Nashua, NH (US);
Albert M. Young, Fishkill, NY (US);
Anthony I. Chou, Guilderland, NY (US);
Junli Wang, Slingerlands, NY (US);
Brent A Anderson, Jericho, VT (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10W 20/41 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10D 62/118 (2025.01); H10D 30/031 (2025.01); H10D 30/6757 (2025.01); H10D 64/017 (2025.01); H10D 84/0128 (2025.01); H10D 84/038 (2025.01); H10W 20/435 (2026.01); H10W 90/00 (2026.01);
Abstract
A semiconductor device including a first pair of stacked transistors having a first upper transistor and a first lower transistor, a second pair of stacked transistors comprising a second upper transistor and a second lower transistor, and a first cross-connection between the first upper transistor and the second lower transistor.