The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2026
Filed:
Sep. 15, 2022
Nxp Usa, Inc., Austin, TX (US);
Meng Kong Lye, Shah Alam, MY;
Zhijie Wang, Tianjin, CN;
You Ge, Tianjin, CN;
Zhiming Li, Tianjin, CN;
NXP USA, Inc., Austin, TX (US);
Abstract
According to a first aspect of the present invention there is provided a quad-flat-no-leads (QFN) packaged semiconductor device having a QFN bottom surface and QFN side faces, wherein the QFN side faces each comprise an upper portion and a recessed lower portion, the QFN packaged semiconductor device comprising: a die pad within or on the QFN bottom surface; a plurality of I/O terminals spaced apart from the die pad and around a periphery of the bottom surface, each having a bottom face extending from an inner end to a peripheral end, an exposed side face on a QFN side face and extending above the recessed lower portion of the QFN side face; wherein the QFN bottom surface includes at least one trench therein, parallel to a one of the QFN side faces and exposing at least a part of a side face of the inner end of the I/O terminals. The trench may provide for additional surface area, and provide a stronger solder joint when the QFN packaged semiconductor device is soldered to a substrate or circuit board.