The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Aug. 17, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Vivek Arora, San Jose, CA (US);

Woochan Kim, San Jose, CA (US);

Anindya Poddar, Sunnyvale, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10W 40/77 (2026.01); H10W 70/40 (2026.01); H10W 72/00 (2026.01); H10W 72/90 (2026.01); H10W 74/10 (2026.01); H10W 72/29 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 40/778 (2026.01); H10W 70/456 (2026.01); H10W 72/0198 (2026.01); H10W 72/90 (2026.01); H10W 74/111 (2026.01); H10W 72/07236 (2026.01); H10W 72/29 (2026.01); H10W 72/877 (2026.01); H10W 90/726 (2026.01); H10W 90/734 (2026.01);
Abstract

In a described example, an apparatus includes: a package substrate having a die mount surface; semiconductor die flip chip mounted to the package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the active surface of the semiconductor die and connected to the package substrate by solder joints; a thermal interposer comprising a thermally conductive material positioned over and in thermal contact with a backside surface of the semiconductor die; and mold compound covering a portion of the package substrate, a portion of the thermal interposer, the semiconductor die, and the post connects, the thermal interposer having a surface exposed from the mold compound.


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