The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2026

Filed:

Feb. 18, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

See Hiong Leow, Singapore, SG;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 74/00 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 90/20 (2026.01); H10W 90/24 (2026.01);
U.S. Cl.
CPC ...
H10W 90/00 (2026.01); H10W 74/016 (2026.01); H10W 74/117 (2026.01); H10W 74/00 (2026.01); H10W 90/20 (2026.01); H10W 90/24 (2026.01); H10W 90/724 (2026.01); H10W 90/732 (2026.01); H10W 90/734 (2026.01); H10W 90/752 (2026.01); H10W 90/754 (2026.01);
Abstract

Semiconductor die assemblies with molded semiconductor dies, and associated methods and systems are disclosed. In some embodiments, a semiconductor die assembly includes a package substrate and a controller die attached to the package substrate. The semiconductor die assembly comprises a mold structure including the controller die and having a surface facing away from the package substrate. The controller die may be completely encased within the mold structure. Further, one or more stacks of semiconductor dies (e.g., memory dies) are attached to the surface of the mold structure. Accordingly, the semiconductor die assembly does not include support structures for the stacks of semiconductor dies attached above the controller die.


Find Patent Forward Citations

Leow, See. (2026). Semiconductor die assemblies with molded semiconductor dies and associated methods and systems (U.S. Patent No. 12677696). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12677696

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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