The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

May. 31, 2023
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Yan Zhang, Westford, MA (US);

Kyu-Ha Shim, Andover, MA (US);

Johannes M. Van Meer, Middleton, MA (US);

Naushad K. Variam, Marblehead, MA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10P 30/20 (2026.01);
U.S. Cl.
CPC ...
H10D 84/017 (2025.01); H10D 84/0172 (2025.01); H10D 84/0181 (2025.01); H10D 84/038 (2025.01); H10P 30/20 (2026.01);
Abstract

Approaches herein provide devices and methods for forming gate-all-around transistors with improved NBTI. One method may include forming a gate-all-around (GAA) stack including a plurality of alternating first layers and second layers, and forming a source/drain (S/D) cavity through the plurality of alternating first layers and second layers. The method may further include forming an inner spacer in the S/D cavity, adjacent the plurality of alternating first layers and second layers, performing a first implant by directing fluorine ions to the GAA stack, through the S/D cavity, and forming a S/D material in the S/D cavity following the first implant.


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