The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2026
Filed:
Sep. 19, 2023
Kepler Computing Inc., San Francisco, CA (US);
Pramod Kolar, Cary, NC (US);
Rajeev Kumar Dokania, Beaverton, OR (US);
Mustansir Yunus Mukadam, Seattle, WA (US);
Darshak Doshi, Sunnyvale, CA (US);
Biswajeet Guha, Hillsboro, OR (US);
Tanay Gosavi, Portland, OR (US);
Amrita Mathuriya, Portland, OR (US);
Debo Olaosebikan, San Francisco, CA (US);
Sasikanth Manipatruni, Portland, OR (US);
Kepler Computing Inc., San Francisco, CA (US);
Abstract
Described herein is a method and apparatus to reduce electric displacement and polarization target for a memory bit-cell. In at least one embodiment, the apparatus comprises one or more circuitries to adjust voltage on a plate-line to be above or below a nominal voltage of the plate-line based on a write operation or read operation on a bit-cell. In at least one embodiment, the bit-cell comprises a transistor and a capacitor including non-linear polar material, wherein the capacitor has a first terminal coupled to the plate-line and a second terminal coupled to the transistor.