The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

Mar. 22, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Yu Chen Lee, Hsinchu City, TW;

Chin-Hua Wang, New Taipei City, TW;

Shin-Puu Jeng, Po-Shan Village, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 42/00 (2026.01); H10W 70/60 (2026.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01); H10W 74/15 (2026.01);
U.S. Cl.
CPC ...
H10W 42/121 (2026.01); H10W 70/611 (2026.01); H10W 90/401 (2026.01); H10W 72/072 (2026.01); H10W 72/07236 (2026.01); H10W 72/073 (2026.01); H10W 74/15 (2026.01); H10W 90/724 (2026.01); H10W 90/734 (2026.01);
Abstract

An embodiment semiconductor package includes an interposer, a first semiconductor die electrically coupled to a first side of the interposer, and a first reinforcement structure that is mechanically coupled to the interposer and to the first semiconductor die, such that the first reinforcement structure is a solid structure that is adhered to the interposer and to the first semiconductor die and includes an adhesive strength that is greater than 5 N/mmand less than 10 N/mm. The first reinforcement structure is formed at a corner or at an edge of the first semiconductor die and may have a modulus that is greater than 0.1 GPa and less than 1.0 GPa. The semiconductor package may further include a second semiconductor die electrically coupled to the first side of the interposer and a second reinforcement structure that is mechanically coupled to the interposer and to the second semiconductor die.


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