The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 16, 2026

Filed:

Jan. 23, 2023
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chin-Liang Chen, Hsinchu, TW;

Chi-Yu Lu, Hsinchu, TW;

Ching-Wei Tsai, Hsinchu, TW;

Chun-Yuan Chen, Hsinchu, TW;

Li-Chun Tien, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 86/00 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10W 20/42 (2026.01); H10W 20/43 (2026.01);
U.S. Cl.
CPC ...
H10W 20/43 (2026.01); H10D 84/0149 (2025.01); H10D 84/0151 (2025.01); H10D 84/038 (2025.01); H10D 86/00 (2025.01); H10W 20/42 (2026.01);
Abstract

Provided are semiconductor devices that include a first gate structure having a first end cap portion, a second gate structure having a second end cap portion coaxial with the first gate structure, a first dielectric region separating the first end cap portion and the second end cap portion, a first conductive element extending over the first gate structure, a second conductive element extending over the second gate structure, and a gate via electrically connecting the second gate structure and the second conductive element, with the first dielectric region having a first width and being positioned at least partially under the first conductive element and defines a spacing between the gate via and an end of the second end cap portion that exceeds a predetermined distance.


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