The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2026
Filed:
May. 31, 2023
Ai Chip Center for Emerging Smart Systems Limited, Hong Kong, HK;
AI Chip Center for Emerging Smart Systems Limited, Hong Kong, HK;
Abstract
An automatic compilation method and framework for generating a layout for an integrated memory-compute circuit design is provided. The automatic compilation method comprises: constructing a design database with at least one basic design library and a collection of referencing architecture templates; receiving a user specification associated with the integrated memory-compute circuit design; selecting a referencing architecture template from the design database and parameterizing the selected architecture template according to the received user specification to generate an architecture for the integrated memory-compute circuit design; generating a physical layout based on the generated architecture according to one or more placement-and-routing algorithms; iterating a design exploration loop on the generated layout with one or more expertise experience-based optimization schemes to obtain one or more explored physical layouts; and evaluating hardware metrics of the one or more explored physical layouts to determine an optimal physical layout.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile