The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2026
Filed:
Jun. 27, 2023
Sumitomo Electric Device Innovations, Inc., Yokohama, JP;
Seiya Takashima, Coppell, TX (US);
SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC., Yokohama, JP;
Abstract
A semiconductor device includes a cavity package including a substrate and at least one output lead disposed higher than the substrate, in a side view, to create a cavity. A transistor die is disposed within the cavity. A top surface of the transistor die is lower than a top surface of the output lead when viewed in the side view. A first substrate is disposed within the cavity and is separate from the transistor die. A top surface of the first substrate is lower than the top surface of the output lead in the side view. A shunt wire connects an output of the transistor die to the first substrate, and an output wire connects the output of the transistor substrate to the output lead. The shunt wire or the output wire is disposed and shaped to minimize self-inductance and to minimize mutual inductance with the shunt wire.