The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2026

Filed:

Sep. 05, 2023
Applicant:

Walton Advanced Engineering, Inc., Kaohsiung, TW;

Inventors:

Hong-Chi Yu, Kaohsiung, TW;

Chun-Jung Lin, Kaohsiung, TW;

Ruei-Ting Gu, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 23/31 (2006.01); H10W 42/20 (2026.01); H10W 74/10 (2026.01);
U.S. Cl.
CPC ...
H10W 42/20 (2026.01); H10W 74/117 (2026.01);
Abstract

A chip package with at least one electromagnetic interference (EMI) shielding layer and at least one ground wire and a method of manufacturing the same are provided. The chip package includes a chip package unit, at least one EMI shielding layer, and at least one ground wire. The ground wire which consists of a first end and a second end opposite to the first end is inserted through the EMI shielding layer and a first insulating layer of the chip package unit. The first end is electrically connected with the EMI shielding layer while the second end of the ground wire is electrically connected with at least one grounding end of at least one first circuit layer of the chip package unit for protection against static electricity. Thereby malfunction of an electronic system with semiconductor chips due to static electricity can be avoided.


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