The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

Jul. 26, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Lingming Yang, Meridian, ID (US);

Raghukiran Sreeramaneni, Frisco, TX (US);

Nevil N. Gajera, Meridian, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/52 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G11C 29/52 (2013.01); G11C 29/76 (2013.01); G11C 29/785 (2013.01);
Abstract

A stacked memory device (e.g., a high-bandwidth memory (HBM) device) having a storage component is disclosed. The stacked memory device can include a first logic die, one or more memory dies, a second logic die, and one or more storage dies. The first logic die is coupled with the one or more memory dies and the second logic die through TSVs. The second logic die is coupled with the one or more storage dies through additional TSVs. The first logic die can issue commands to the one or more memory dies that cause the one or more memory dies to perform operations (e.g., read/write operations). The first logic die can also issue commands to the second logic die that cause the second logic die to issue commands to the one or more storage dies to perform operations.


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