The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2026

Filed:

Jan. 24, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Chen-Wei Liang, Hsinchu, TW;

Gu-Huan Li, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 8/18 (2006.01);
U.S. Cl.
CPC ...
G11C 8/18 (2013.01);
Abstract

A memory circuit includes a memory array, and a peripheral circuit. The peripheral circuit includes an internal clock generating circuit, and a first access signal generating circuit. The internal clock generating circuit is configured to, in response to a control signal pulse, generate a series of internal clock pulses at an internal clock period corresponding to a pulse width of the control signal pulse. The first access signal generating circuit is configured to, in response to a first edge of the control signal pulse, generate a first access signal. The peripheral circuit is configured to control an access operation in the memory array, based on at least one internal clock pulse in the series of internal clock pulses, and the first access signal.


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