The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

Jul. 27, 2023
Applicant:

Walton Advanced Engineering, Inc., Kaohsiung, TW;

Inventors:

Hong-Chi Yu, Kaohsiung, TW;

Chun-Jung Lin, Kaohsiung, TW;

Ruei-Ting Gu, Kaohsiung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/532 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H10W 20/00 (2026.01); H10W 40/22 (2026.01); H10W 42/20 (2026.01); H10W 74/01 (2026.01); H10W 74/10 (2026.01); H10W 74/00 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 42/20 (2026.01); H10W 20/044 (2026.01); H10W 40/22 (2026.01); H10W 74/014 (2026.01); H10W 74/019 (2026.01); H10W 74/117 (2026.01); H10W 74/00 (2026.01); H10W 90/734 (2026.01);
Abstract

A chip package having four sides provided with electromagnetic interference (EMI) shielding layers correspondingly and a method of manufacturing the same are provided. The four EMI shielding layers are made of metals, located on four lateral sides of the chip package, and completely covering four lateral sides of a substrate and four lateral sides of an insulating layer to prevent at least one first circuit layer, at least one second circuit layer, and at least one chip from electromagnetic interference. Moreover, the EMI shielding layers help to improve heat dissipation efficiency of the first circuit layer, the second circuit layer, and the chip.


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