The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2026

Filed:

May. 25, 2023
Applicant:

Yangtze Memory Technologies Co., Ltd., Wuhan, CN;

Inventors:

Quan Zhang, Wuhan, CN;

Lan Yao, Wuhan, CN;

Boru Xie, Wuhan, CN;

Jie Yan, Wuhan, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/62 (2025.01); H10B 41/20 (2023.01); H10B 41/35 (2023.01); H10B 43/20 (2023.01); H10B 43/35 (2023.01); H10D 30/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/83 (2025.01);
U.S. Cl.
CPC ...
H10D 30/6211 (2025.01); H10B 41/20 (2023.02); H10B 41/35 (2023.02); H10B 43/20 (2023.02); H10B 43/35 (2023.02); H10D 30/024 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01); H10D 84/834 (2025.01);
Abstract

Examples of the present application provide a semiconductor device, a fabrication method thereof, a 3D memory and a memory device, wherein the semiconductor device includes: a substrate including first fins and second fins; a first gate oxide layer disposed on the first fins; a second gate oxide layer disposed on the second fins, wherein the sum of the thicknesses of the first fin and the first gate oxide layer is less than or equal to the sum of the thicknesses of the second fin and the second gate oxide layer; and a gate layer disposed on the first gate oxide layer and the second gate oxide layer. In the way described above, difficulty of etching process is reduced and yield and performance of products are improved.


Find Patent Forward Citations

Zhang, Quan. (2026). Semiconductor devices including a plurality of fins with corresponding gate oxide layers, fabrication methods thereof, 3d memories and memory devices (U.S. Patent No. 12635172). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12635172

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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