The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Aug. 31, 2022
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Andreas Kuesel, Munich, DE;

Takamasa Suzuki, Tokyo, JP;

Jens Polney, Munich, DE;

Seiji Narui, Kanagawa, JP;

Shiro Uchiyama, Kanagawa, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 24/09 (2013.01); H01L 24/08 (2013.01); H01L 24/16 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/08056 (2013.01); H01L 2224/09133 (2013.01); H01L 2224/09153 (2013.01); H01L 2224/09179 (2013.01); H01L 2224/09515 (2013.01); H01L 2224/16145 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06593 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01); H01L 2924/30105 (2013.01);
Abstract

Layouts for data pads on a semiconductor die are disclosed. An apparatus may include circuits, a first edge, a second edge perpendicular to the first edge, a third edge opposite the first edge, and a fourth edge opposite the second edge. The apparatus may also include data pads variously electrically coupled to the circuits. The data pads may include a data pad positioned a first distance from the first edge and a second distance from the second edge. The apparatus may also include dummy data pads electrically isolated from the circuits. The dummy data pads may include a dummy data pad positioned substantially the first distance from the first edge and substantially the second distance from the fourth edge. Associated systems and methods are also disclosed.


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