The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2026

Filed:

Aug. 27, 2024
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Jun Wan, San Jose, CA (US);

Ying Tai, Mountain View, CA (US);

Wei Wang, Dublin, CA (US);

Zhenming Zhou, San Jose, CA (US);

Assignee:

MICRON TECHNOLOGY, INC., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1044 (2013.01);
Abstract

A method for managing error correction in a memory device includes identifying, by a memory controller, codewords in a memory array of the memory device that have bad columns. The method includes calculating, by the memory controller, an increased Error Correction Code (ECC) layer for each identified codeword based on a number of errors introduced by the bad columns. The method also includes redistributing, by the memory controller, ECC layers from one or more other codewords that have extra ECC layers to increase the ECC layers for the identified codewords with bad columns to enable implementation of the redistributed ECC layers on each codeword in the memory array.


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