The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2026
Filed:
Nov. 27, 2022
United Microelectronics Corp., Hsin-Chu City, TW;
Shu-Wei Yeh, Taichung City, TW;
Chang-Hung Chen, Tainan City, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu City, TW;
Abstract
The invention provides a layout pattern of static random access memory, which comprises a plurality of fin structures on a substrate, a plurality of gate structures on the substrate and spanning the fin structures to form a plurality of transistors distributed on the substrate. The transistors include a first pull-up transistor (PU), a first pull-down transistor (PD), a second pull-up transistor (PU) and a second pull-down transistor (PD), a first access transistor (PG), a second access transistor (PG), a first read port transistor (RPD) and a second read port transistor (RPG). The gate structure of the first read port transistor (RPD) is connected to the gate structure of the first pull-down transistor (PD), wherein a drain of the first pull-down transistor (PD) is connected to a first voltage source Vss, and a drain of the first read port transistor (RPD) is connected to a second voltage source Vss