Self-aligned backside contact structure for semiconductor device power delivery

Abstract

A semiconductor structure includes a field effect transistor having a plurality of source/drain regions and a metal gate structure. A dielectric layer is in contact with a first surface of each of the plurality of source/drain regions, while a bottom dielectric isolation layer is in contact with a first surface of the metal gate structure. The bottom dielectric isolation layer is coplanar with the dielectric layer. The semiconductor structure further includes a backside metal contact that extends through a backside interlevel dielectric and the dielectric layer until an uppermost surface of at least one source/drain region of the plurality of source/drain regions. The backside interlevel dielectric is disposed above the dielectric layer and above the bottom dielectric isolation layer. The backside metal contact electrically connects the at least one source/drain region to a backside interconnect structure disposed above the backside interlevel dielectric.