The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2026
Filed:
Dec. 31, 2019
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Cheok-Kei Lei, Hsinchu, TW;
Chi-Lin Liu, Hsinchu, TW;
Yu-Lun Ou, Hsinchu, TW;
Chien-Hsing Li, Hsinchu, TW;
Zhe-Wei Jiang, Hsinchu, TW;
Hui-Zhong Zhuang, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A system and method for transistor placement in a standard cell layout includes identifying a plurality of transistors in a circuit. A drain terminal of each of the plurality of transistors is connected to an output of the circuit. The system and method also include determining that a first transistor and a second transistor of the plurality of transistors satisfy a merging priority, combining an active region of the first transistor and the second transistor to form a mega transistor having a common active region, and replacing the first transistor and the second transistor in the standard cell layout of the circuit with the mega transistor. The common active region combines the active region of a first drain terminal of the first transistor and a second drain terminal of the second transistor.