The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2026
Filed:
Nov. 01, 2023
Powerchip Semiconductor Manufacturing Corporation, Hsinchu, TW;
Chih-Feng Sung, Hsinchu, TW;
Chih-Hao Chuang, Hsinchu, TW;
Chun-Lin Lu, Hsinchu, TW;
Shih-Ping Lee, Hsinchu, TW;
Li-Han Chiu, Hsinchu, TW;
Yi-Kai Wu, Hsinchu, TW;
Powerchip Semiconductor Manufacturing Corporation, Hsinchu, TW;
Abstract
A wafer stacking process is provided in the present invention, including steps of forming a silicon oxide layer on a sacrificial carrier, bonding the silicon oxide layer with a dielectric layer on a front side of a silicon substrate, performing a thinning process on the back side of the silicon substrate to expose TSVs therewithin, bonding the back side of the silicon substrate with another silicon substrate, repeating the thinning process and the process of bonding another silicon substrate above so as to form a wafer stacking structure, and performing a removing process to completely remove the sacrificial carrier.