The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2026

Filed:

Nov. 11, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Nicholas Anthony Lanzillo, Wynantskill, NY (US);

Huai Huang, Clifton Park, NY (US);

Hosadurga Shobha, Niskayuna, NY (US);

Lawrence A. Clevenger, Saratoga Springs, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5283 (2013.01); H01L 21/76804 (2013.01); H01L 21/76807 (2013.01); H01L 21/76885 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 23/53295 (2013.01); H01L 21/76897 (2013.01);
Abstract

A semiconductor structure comprises two or more interconnect lines of a first width in a given interconnect level, and two or more interconnect lines of a second width in the given interconnect level. The two or more interconnect lines of the second width are disposed between a first one of the two or more interconnect lines of the first width and a second one of the two or more interconnect lines of the second width. The two or more interconnect lines of the first width have sidewalls with a negative taper angle. The two or more interconnect lines of the second width have sidewalls with a positive taper angle.


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