The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2026
Filed:
Dec. 13, 2021
Intel Corporation, Santa Clara, CA (US);
Sukru Yemenicioglu, Portland, OR (US);
Xinning Wang, Portland, OR (US);
Allen B. Gardiner, Portland, OR (US);
Tahir Ghani, Portland, OR (US);
Mohit K. Haran, Hillsboro, OR (US);
Leonard P. Guler, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Integrated circuit structures having gate cut offset, and methods of fabricating integrated circuit structures having gate cut offset, are described. For example, an integrated circuit structure includes a first vertical stack of horizontal nanowires. A second vertical stack of horizontal nanowires is spaced apart from and parallel with the first vertical stack of horizontal nanowires. A gate structure includes a first gate structure portion over the first vertical stack of horizontal nanowires, a second gate structure over the second vertical stack of horizontal nanowires, and a gate cut between the first gate structure portion and the second gate structure portion, the gate cut laterally closer to the second vertical stack of horizontal nanowires than to the first vertical stack of horizontal nanowires.