The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2026
Filed:
Aug. 12, 2024
Astera Labs, Inc., Santa Clara, CA (US);
Jitendra Mohan, Santa Clara, CA (US);
Justina Provine, Fremont, CA (US);
Anh T. Tran, Elk Grove, CA (US);
Ken (Keqin) Han, Fremont, CA (US);
Enrique Musoll, San Jose, CA (US);
Astera Labs, Inc., San Jose, CA (US);
Abstract
An integrated circuit component receives a data block and corresponding error correction code from one or more external memory components in a memory read operation and then executes error detection/correction operations with respect to a plurality of input data volumes to generate a corresponding plurality of error syndrome values, the input data volumes each including the data block and corresponding error correction code together with a respective, different metadata bit patterns such that each of the input data volumes is identical to the others of the input data volumes except for the different metadata bit patterns. The integrated circuit component generates error qualification information by comparing error location information within the plurality of syndrome values with predetermined error location information and selects one of the metadata bit patterns to be an output metadata value based on the error syndrome values and the error qualification information.