The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2026

Filed:

Jun. 10, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Hsien-Pin Hu, Zhubei, TW;

Shang-Yun Hou, Jubei, TW;

Shih-Wen Huang, Shuishang Township, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 21/768 (2006.01); H01L 23/31 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); H01L 21/56 (2013.01); H01L 21/76898 (2013.01); H01L 23/3114 (2013.01); H01L 23/5283 (2013.01);
Abstract

A device package including an interposer. The interposer comprising: a semiconductor substrate; first through vias extending through the semiconductor substrate; an interconnect structure comprising: a first metallization pattern in an inorganic insulating material; and a passivation film over the first metallization pattern; and a first redistribution structure over the passivation film. The first redistribution structure comprising a second metallization pattern in an organic insulating material. The device package further including an integrated circuit die over and attached to the interposer; and a first encapsulant around the integrated circuit die.


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