The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2026

Filed:

Aug. 22, 2022
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Kosuke Yoshida, Matsumoto-city, JP;

Koh Yoshikawa, Matsumoto-city, JP;

Nao Suganuma, Matsumoto-city, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 12/00 (2025.01); H10D 64/00 (2025.01);
U.S. Cl.
CPC ...
H10D 62/106 (2025.01); H10D 12/481 (2025.01); H10D 62/127 (2025.01); H10D 64/112 (2025.01);
Abstract

Provided is a semiconductor device including: a semiconductor substrate having a drift region of a first conductivity type; an active portion, in which at least one of a transistor portion and a diode portion is provided, in the semiconductor substrate; and an edge termination structure portion provided farther outward than the active portion in the semiconductor substrate, wherein the edge termination structure portion has a plurality of guard rings of a second conductivity type provided in contact with an upper surface of the semiconductor substrate, and an embedded dielectric film arranged between two guard rings and at least partially embedded in the semiconductor substrate, and the guard rings are provided up to a position below the embedded dielectric film.


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