The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Jan. 02, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Yuhsiang Chen, Hsinchu City, TW;

Meng-Sheng Chang, Hsinchu City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 17/16 (2006.01); G11C 17/18 (2006.01); H01L 23/00 (2006.01); H10B 20/25 (2023.01);
U.S. Cl.
CPC ...
H01L 23/573 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); H10B 20/25 (2023.02);
Abstract

A semiconductor device includes a memory cell randomly presenting a first logic state or a second logic state and formed on a first side of a substrate, and a first and a second bit lines formed on a second side of the substrate opposite to the first side. The memory cell includes: a programming transistor having a first and a second source/drain terminals; a first reading transistor having a first source/drain terminal coupled to the first source/drain terminal of the programming transistor; and a second reading transistor having a first source/drain terminal coupled to the second source/drain terminal of the programming transistor. The first bit line is operatively coupled to a second source/drain terminal of the first reading transistor, and the second bit line is operatively coupled to a second source/drain terminal of the second reading transistor.


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