The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Oct. 13, 2022
Applicant:

Globalfoundries U.s. Inc., Malta, NY (US);

Inventors:

Robert Viktor Seidel, Dresden, DE;

Suk Hee Jang, Singapore, SG;

Anastasia Voronova, Dresden, DE;

Young Seon You, Singapore, SG;

Assignee:

GLOBALFOUNDRIES U.S. Inc., Malta, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10N 70/00 (2023.01); H10B 63/00 (2023.01); H10N 70/20 (2023.01);
U.S. Cl.
CPC ...
H10N 70/828 (2023.02); H10B 63/80 (2023.02); H10N 70/011 (2023.02); H10N 70/24 (2023.02); H10N 70/826 (2023.02);
Abstract

The disclosure provides a structure and method for a memory element to confine a metal (e.g., a remaining portion of a metallic residue) with a spacer. A structure according to the disclosure includes a memory element over a first portion of an insulator layer. A portion of the memory element includes a sidewall over the insulator layer. A spacer is adjacent the sidewall of the memory element and on the first portion of the insulator layer. A metal-dielectric layer is within an interface between the spacer and the sidewall or an interface between the spacer and the first portion of the insulator layer. The insulator layer includes a second portion adjacent the first portion, and the second portion does not include the memory element, the spacer, and the metal-dielectric layer thereon.


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