The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2026

Filed:

Jun. 29, 2022
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;

Inventors:

Shyh-Wei Cheng, Zhudong Township, TW;

Chih-Yu Wang, Taichung City, TW;

Hsi-Cheng Hsu, Taichung City, TW;

Ji-Hong Chiang, Changhua City, TW;

Jui-Chun Weng, Taipei City, TW;

Shiuan-Jeng Lin, Hsinchu City, TW;

Wei-Ding Wu, Zhubei City, TW;

Ching-Hsiang Hu, Taipei City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81B 7/00 (2006.01); B81C 1/00 (2006.01);
U.S. Cl.
CPC ...
B81B 7/007 (2013.01); B81B 7/0006 (2013.01); B81C 1/00238 (2013.01); B81C 1/00301 (2013.01); B81B 2207/012 (2013.01); B81B 2207/096 (2013.01); B81C 2201/013 (2013.01); B81C 2203/0109 (2013.01); B81C 2203/0118 (2013.01); B81C 2203/037 (2013.01); B81C 2203/0792 (2013.01);
Abstract

The present disclosure relates to a micro-electromechanical system (MEMS) structure including one or more semiconductor devices arranged on or within a first substrate and a MEMS substrate having an ambulatory element. The MEMS substrate is connected to the first substrate by a conductive bonding structure. A capping substrate is arranged on the MEMs substrate. The capping substrate includes a semiconductor material that is separated from the first substrate by the MEMS substrate. One or more conductive polysilicon vias include a polysilicon material that continuously extends from the conductive bonding structure, completely through the MEMS substrate, and to within the capping substrate. The semiconductor material of the capping substrate covers opposing sidewalls of the polysilicon material and an upper surface of the polysilicon material that is between the opposing sidewalls.


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