The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2026

Filed:

Dec. 22, 2022
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Mukta Ghate Farooq, Hopewell Jct, NY (US);

Arvind Kumar, Chappaqua, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10B 80/00 (2023.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 23/528 (2006.01); H01L 23/538 (2006.01); H01L 25/18 (2023.01);
U.S. Cl.
CPC ...
H10B 80/00 (2023.02); H01L 23/481 (2013.01); H01L 23/528 (2013.01); H01L 23/5386 (2013.01); H01L 24/02 (2013.01); H01L 24/08 (2013.01); H01L 25/18 (2013.01); H01L 24/16 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/02373 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/16225 (2013.01);
Abstract

Heterogeneous integration semiconductor packages with voltage regulation are described. A semiconductor device can include a chip including a memory device and a plurality of through-silicon-vias (TSVs). The semiconductor device can further include a processor arranged on top of the chip. The processor can be configured to communicate with the memory device via a plurality of interconnects. The semiconductor device can further include at least one voltage regulator arranged on top of the chip. The at least one voltage regulator can be configured to regulate power being provided from the plurality of TSVs to the processor.


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