The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2026

Filed:

Dec. 14, 2023
Applicant:

Fuji Electric Co., Ltd., Kanagawa, JP;

Inventors:

Shigeki Sato, Matsumoto, JP;

Seiji Momota, Matsumoto, JP;

Tadashi Miyasaka, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 84/40 (2025.01); H10D 8/00 (2025.01); H10D 12/00 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 62/17 (2025.01); H10D 62/53 (2025.01); H10D 64/00 (2025.01); H10D 64/23 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 84/406 (2025.01); H10D 8/411 (2025.01); H10D 8/422 (2025.01); H10D 12/481 (2025.01); H10D 62/105 (2025.01); H10D 62/117 (2025.01); H10D 62/151 (2025.01); H10D 62/393 (2025.01); H10D 62/53 (2025.01); H10D 64/231 (2025.01); H10D 64/513 (2025.01); H10D 64/117 (2025.01);
Abstract

A semiconductor device is preferably excellent in characteristics such as a loss characteristic. Provided is a semiconductor device including a semiconductor substrate, including an upper-surface electrode provided on an upper surface of the semiconductor substrate; an lower-surface electrode provided on a lower surface of the semiconductor substrate; a transistor portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode; a first diode portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode; and a second diode portion provided in the semiconductor substrate and connected to the upper-surface electrode and the lower-surface electrode, wherein the first diode portion and the second diode portion have different resistivities in a depth direction of the semiconductor substrate.


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