The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2026
Filed:
Feb. 13, 2023
Changxin Memory Technologies, Inc., Hefei City, CN;
Joonsuk Moon, Hefei City, CN;
Si Zhang, Hefei City, CN;
Jo-Lan Chin, Hefei City, CN;
Semyeong Jang, Hefei City, CN;
Yanlong Li, Hefei City, CN;
CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei City, CN;
Abstract
A semiconductor structure includes a peripheral region and an array region. A substrate is provided. An active layer is provided in the substrate corresponding to the peripheral region. A word line groove is formed in the substrate corresponding to the array region. A word line is formed in the word line groove. The word line includes a first word line conductive layer and a second word line conductive layer with one stacked on another. A top of the first word line conductive layer is a protrusion. The protrusion protrudes along a direction pointing from the first word line conductive layer to the second word line conductive layer. An isolation layer covering the substrate is formed. A first through hole and a second through hole both penetrating through the isolation layer are formed simultaneously. The first through hole exposes the active layer. The second through hole exposes the protrusion.