logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12575122 B1

PDFFull Text
Date of Patent:
Mar. 10, 2026

Filed:

Jun. 13, 2023

Fin-based field effect transistor (fet) source/drain strain to enhance driver current and performance

Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Xia Li, San Diego, CA (US);

Kwanyong Lim, San Diego, CA (US);

Haining Yang, San Diego, CA (US);

Biswa Ranjan Panda, Bangaluru, IN;

Ramesh Manchana, Hyderabad, IN;

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:

Seyfarth Shaw LLP

Primary Examiner:

David C Spalla

Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/775 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/62 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 30/024 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6211 (2025.01); H10D 30/6219 (2025.01); H10D 30/6735 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/017 (2025.01); H10D 84/0167 (2025.01); H10D 84/017 (2025.01); H10D 84/0193 (2025.01); H10D 84/038 (2025.01); H10D 84/853 (2025.01);
Abstract

A field effect transistor (FET) is described. The FET includes a substrate, having a first vertical structure on the substrate, including a source/drain region having a first stressor material. The FET also includes a second vertical structure on the substrate and including a drain/source region having a second stressor material different from the first stressor material. The FET further includes a metal gate on the first vertical structure and on the second vertical structure.

Find Patent Forward Citations

Quick Actions:

Li, Xia. (2026). Fin-based field effect transistor (fet) source/drain strain to enhance driver current and performance (U.S. Patent No. 12575122). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12575122

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…