Threshold voltage tuning for nanoribbon-based transistors

Abstract

Fabrication methods that may provide greater versatility in tuning threshold voltage of transistors implemented in different nanoribbons within a given stack and in tuning threshold voltage of transistors implemented in adjacent nanoribbon stacks, as well as corresponding devices, are disclosed. An example fabrication method includes selectively doping portions of semiconductor layers from which individual nanoribbons will be formed later. The selective doping is performed on a layer-by-layer basis, i.e., after a given semiconductor layer is deposited and before the next layer is deposited. In this manner, some nanoribbons of a given nanoribbon stack may be doped, while other nanoribbons of the same stack may be substantially undoped, or, more generally, different nanoribbons of a given nanoribbon stack may have different dopant concentrations. The differences in the dopant concentration of different nanoribbons within the stack advantageously allows forming transistors with different threshold voltages in a single nanoribbon stack.