The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2026

Filed:

Apr. 14, 2022
Applicant:

Winbond Electronics Corp., Taichung City, TW;

Inventors:

Ling-Chun Tseng, Taichung City, TW;

Tzu-Ming Ou Yang, Taichung City, TW;

Pin-Han Chiu, Hsinchu City, TW;

Assignee:

WINBOND ELECTRONICS CORP., Taichung City, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H10B 12/00 (2023.01);
U.S. Cl.
CPC ...
H10B 12/485 (2023.02); H10B 12/09 (2023.02); H10B 12/315 (2023.02); H10B 12/50 (2023.02);
Abstract

A method for forming a semiconductor memory structure includes the following steps. A first patterned hard mask layer is formed over a conductive material. The first patterned hard mask layer includes first strip patterns and a mesa pattern. The mesa pattern is connected with the first strip patterns. A second patterned hard mask layer is formed over the first patterned hard mask layer. The second patterned hard mask layer includes second strip patterns overlapping the first strip patterns and first wire patterns overlapping the mesa pattern. The first patterned hard mask layer is etched using the second patterned hard mask layer. The remaining portions of the first strip patterns form pad patterns. The remaining portions of the mesa pattern form second wire patterns. The pad patterns and the second wire patterns are transferred into the conductive material.


Find Patent Forward Citations

Loading…