The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2026

Filed:

Dec. 04, 2023
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Ferdinando Bedeschi, Biassono, IT;

Umberto Di Vincenzo, Capriate San Gervasio, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/22 (2006.01); G11C 11/408 (2006.01); G11C 11/4091 (2006.01);
U.S. Cl.
CPC ...
G11C 11/2257 (2013.01); G11C 11/2273 (2013.01); G11C 11/4085 (2013.01); G11C 11/4091 (2013.01);
Abstract

Methods, systems, and devices for word line charge integration are described. In some examples, a memory device may include a plurality of memory cells that are coupled with a word line and respective digit lines. During a read operation, the word line may be activated (e.g., driven to a voltage) and a subset of the respective digit lines may be activated (e.g., driven to a voltage) to begin integrating charges of each of the memory cells. Before each digit line is activated, the word line may be deactivated and the remaining digit lines may be activated (e.g., driven to a voltage) to begin integrating charges of the remaining memory cells that are coupled with the word line. After each of the digit lines are selected, respective sense components may be activated to sense the charges associated with the memory cells.


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