The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Oct. 13, 2022
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Stefano Parascandola, Dresden, DE;

Dirk Offenberg, Dresden, DE;

Boris Binder, Dresden, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10F 39/00 (2025.01); H10F 30/22 (2025.01); H10F 71/00 (2025.01);
U.S. Cl.
CPC ...
H10F 39/807 (2025.01); H10F 30/22 (2025.01); H10F 39/014 (2025.01); H10F 39/811 (2025.01); H10F 71/121 (2025.01);
Abstract

A heteroepitaxial semiconductor device includes a bulk semiconductor substrate, a seed layer including a first semiconductor material, the seed layer being arranged at a first side of the bulk semiconductor substrate and including a first side facing the bulk semiconductor substrate, an opposing second side and lateral sides connecting the first and second sides, a separation layer arranged between the bulk semiconductor substrate and the seed layer, a heteroepitaxial structure grown on the second side of the seed layer and including a second semiconductor material, different from the first semiconductor material, and a dielectric material layer arranged on the seed layer and at least partially encapsulating the heteroepitaxial structure, wherein the dielectric material layer also covers the lateral sides of the seed layer.


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