The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Jun. 24, 2022
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Kai-Qiang Wen, Hsinchu, TW;

Shih-Fen Huang, Jhubei, TW;

Shih-Chun Fu, Hsinchu, TW;

Chi-Yuan Shih, Hsinchu, TW;

Feng Yuan, Hsinchu, TW;

Wan-Lin Tsai, Hsinchu, TW;

Chung-Liang Cheng, Changhua County, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 84/80 (2025.01); H10D 1/00 (2025.01); H10D 1/43 (2025.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 64/01 (2025.01);
U.S. Cl.
CPC ...
H10D 84/811 (2025.01); H10D 1/025 (2025.01); H10D 1/43 (2025.01); H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 64/017 (2025.01);
Abstract

Embodiments include a FinFET transistor including an embedded resistor disposed in the fin between the source epitaxial region and the source contact. A control contact may be used to bias the embedded resistor, thereby changing the resistivity of the resistor. Edge gates of the FinFET transistor may be replaced with insulating structures. Multiple ones of the FinFET/embedded resistor combination may be utilized together in a common drain/common source contact design.


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