The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 24, 2026
Filed:
Dec. 21, 2021
Applicant:
International Business Machines Corporation, Armonk, NY (US);
Inventors:
Ruilong Xie, Niskayuna, NY (US);
Chen Zhang, Guilderland, NY (US);
Jingyun Zhang, Albany, NY (US);
Pietro Montanini, Albany, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 30/67 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01);
U.S. Cl.
CPC ...
H10D 62/118 (2025.01); H10D 30/6713 (2025.01); H10D 30/6757 (2025.01); H10D 62/115 (2025.01); H10D 84/0128 (2025.01); H10D 84/013 (2025.01); H10D 84/038 (2025.01);
Abstract
Embodiments herein include semiconductor structures with an active channel stack having an upper field-effect transistor (FET) and a lower FET vertically stacked below the upper FET The semiconductor structure may also include a dummy stub adjacent to the active channel stack, a lower source/drain (S/D) connected to the active channel stack and laterally extended over the dummy stub, and an upper S/D connected to the active channel stack above the lower S/D.