The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 24, 2026

Filed:

Apr. 02, 2024
Applicant:

Sandisk Technologies, Inc., Milpitas, CA (US);

Inventors:

Jiahui Yuan, Fremont, CA (US);

Ming Wang, Shanghai, CN;

Liang Li, Shanghai, CN;

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); G11C 29/52 (2006.01);
U.S. Cl.
CPC ...
G11C 29/52 (2013.01); G11C 16/26 (2013.01); G11C 16/3404 (2013.01);
Abstract

In response to determining that a data set was not read successfully, the system identifies memory cells storing error bits that are in upper tails and lower tails of the threshold voltages distributions. To reduce the number of errors, memory cells storing error bits that are in upper tails have their threshold voltages reduced by bit level erase and memory cells storing error bits that are in lower tails have their threshold voltages increased by bit level program. The identification of which memory cells with error bits are in upper tails and lower tails can be determined on the memory die using a series of latch based operations.


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