The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2026

Filed:

Nov. 23, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Huiching Chang, Hsinchu, TW;

I-Ming Chang, Hsinchu, TW;

Huang-Lin Chao, Hillsboro, OR (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 84/03 (2025.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 30/67 (2025.01); H10D 30/69 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 64/68 (2025.01); H10D 84/01 (2025.01); H10D 84/85 (2025.01);
U.S. Cl.
CPC ...
H10D 84/038 (2025.01); H01L 21/02192 (2013.01); H01L 21/0228 (2013.01); H01L 21/0259 (2013.01); H01L 21/28088 (2013.01); H10D 30/024 (2025.01); H10D 30/031 (2025.01); H10D 30/0415 (2025.01); H10D 30/6211 (2025.01); H10D 30/6735 (2025.01); H10D 30/6739 (2025.01); H10D 30/6757 (2025.01); H10D 30/701 (2025.01); H10D 62/118 (2025.01); H10D 64/017 (2025.01); H10D 64/689 (2025.01); H10D 84/0167 (2025.01); H10D 84/0177 (2025.01); H10D 84/0181 (2025.01); H10D 84/0186 (2025.01); H10D 84/0193 (2025.01); H10D 84/853 (2025.01);
Abstract

A method of forming a semiconductor device includes forming a transistor comprising a gate stack on a semiconductor substrate by, at least, forming a first dielectric layer on the semiconductor substrate, forming a dipole layer on the dielectric layer; forming a second dielectric layer on the dipole layer, forming a conductive work function layer on the second dielectric layer, forming a gate electrode layer on the conductive work function layer. The method also includes varying a distance between dipole inducing elements in the dipole layer and a surface of the semiconductor substrate by tuning a thickness of the first dielectric layer to adjust a threshold voltage of the transistor.


Find Patent Forward Citations

Chang, Huiching. (2026). High-k dielectric materials with dipole layer (U.S. Patent No. 12557368). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12557368

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…