The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 17, 2026

Filed:

Feb. 24, 2024
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Bo-Feng Young, Taipei, TW;

Mauricio Manfrini, Zhubei, TW;

Sai-Hooi Yeong, Zhubei, TW;

Han-Jong Chia, Hsinchu, TW;

Yu-Ming Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/22 (2006.01); H01L 21/02 (2006.01); H10B 53/30 (2023.01); H10D 30/67 (2025.01); H10D 99/00 (2025.01);
U.S. Cl.
CPC ...
H10B 53/30 (2023.02); G11C 11/221 (2013.01); G11C 11/2259 (2013.01); G11C 11/2275 (2013.01); H01L 21/02565 (2013.01); H10D 30/6755 (2025.01); H10D 99/00 (2025.01);
Abstract

A memory device includes metal interconnect structures embedded within dielectric material layers that overlie a top surface of a substrate, a thin film transistor embedded in a first dielectric material layer selected from the dielectric material layers, and is vertically spaced from the top surface of the substrate, and a ferroelectric memory cell embedded within the dielectric material layers. A first node of the ferroelectric memory cell is electrically connected to a node of the thin film transistor through a subset of the metal interconnect structures that is located above, and vertically spaced from, the top surface of the substrate.


Find Patent Forward Citations

Loading…