The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 17, 2026
Filed:
Jul. 25, 2022
Applicants:
Changxin Memory Technologies, Inc., Hefei, CN;
Beijing Superstring Academy of Memory Technology, Beijing, CN;
Inventors:
Assignees:
CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;
BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY, Beijing, CN;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H10D 30/01 (2025.01); H10D 30/63 (2025.01); H10D 30/67 (2025.01); H10D 30/69 (2025.01); H10D 84/80 (2025.01);
U.S. Cl.
CPC ...
H10B 12/395 (2023.02); H10B 12/0383 (2023.02); H10B 12/05 (2023.02); H10D 30/025 (2025.01); H10D 30/63 (2025.01); H10D 30/751 (2025.01); H10D 30/797 (2025.01); H10B 12/053 (2023.02); H10B 12/31 (2023.02); H10D 30/031 (2025.01); H10D 30/6704 (2025.01); H10D 30/798 (2025.01); H10D 84/80 (2025.01);
Abstract
Provided are a semiconductor structure and a method for manufacturing the same, a memory device and a method for manufacturing the same. The semiconductor structure includes at least one transistor. Each of the at least one transistor includes a channel including a first semiconductor layer and a second semiconductor layer disposed around the first semiconductor layer. The second semiconductor layer introduces strain into the channel.