Plurality of semiconductor fin structures in p-type metal-oxide-semiconductor (mos) region and n-type mos region with a plurality of dielectric features in between and methods of forming the same

Abstract

A semiconductor device structure, along with methods of forming such, are described. The method includes forming first and second semiconductor fins in an NMOS region and a PMOS region, respectively, forming a dielectric feature between the first and second semiconductor fins, recessing the first and second semiconductor fins, forming first and second source/drain epitaxial features over the recessed first and second semiconductor fins, respectively, depositing an interlayer dielectric layer over the first and second source/drain epitaxial features, and forming a first opening in the interlayer dielectric layer to expose a first portion of the first source/drain epitaxial feature and a second opening in the interlayer dielectric layer to expose a first portion of the second source/drain epitaxial feature. The first and second openings are separated by a distance that is about 1.5 times to about 2 times a width of the dielectric feature.