The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 2026

Filed:

Aug. 04, 2022
Applicants:

Changxin Memory Technologies, Inc., Hefei, CN;

Beijing Superstring Academy of Memory Technology, Beijing, CN;

Inventors:

Deyuan Xiao, Hefei, CN;

Yong Yu, Hefei, CN;

Guangsu Shao, Hefei, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 12/00 (2023.01); H10D 30/63 (2025.01);
U.S. Cl.
CPC ...
H10B 12/0383 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02); H10D 30/63 (2025.01);
Abstract

The present disclosure provides a manufacturing method of a semiconductor structure and a semiconductor structure. The manufacturing method of a semiconductor structure includes: providing a substrate; forming a plurality of active pillars arranged in an array on the substrate, where the active pillar includes a first segment, a second segment, and a third segment that are connected sequentially, and along a second direction, a cross-sectional area of the second segment is smaller than those of the first segment and the third segment; forming a gate oxide layer on a sidewall of the second segment, a top surface of the first segment, and a bottom surface of the third segment; and forming a gate dielectric layer on the gate oxide layer, where the gate dielectric layer is shorter than the gate oxide layer, and is close to the third segment.


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