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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12546822 B1

PDFFull Text
Date of Patent:
Feb. 10, 2026

Filed:

Dec. 29, 2022

Grpc-based chip test method, grpc-based chip test apparatus, and storage medium

Applicants:

Beijing Eswin Computing Technology Co., Ltd., Beijing, CN;

Guangzhou Transa Semi Information Technology Co., Ltd., Guangzhou, CN;

Inventors:

Zeliang Xie, Beijing, CN;

Yufeng Peng, Beijing, CN;

Zuhua Shi, Beijing, CN;

Ligang Yuan, Beijing, CN;

Huichuang MA, Beijing, CN;

Assignees:

Beijing ESWIN Computing Technology Co., Ltd., Beijing, CN;

Guangzhou Transa Semi Information Technology Co., Ltd., Guangzhou, CN;

Attorney:

Ladas & Parry, LLP

Primary Examiner:

Mohamed Charioui

Int. Cl.
CPC ...
G01R 31/3183 (2006.01); G01R 31/302 (2006.01); G01R 31/317 (2006.01); G01R 31/3181 (2006.01); G01R 31/319 (2006.01);
U.S. Cl.
CPC ...
G01R 31/31813 (2013.01); G01R 31/3025 (2013.01); G01R 31/31725 (2013.01); G01R 31/3183 (2013.01); G01R 31/31908 (2013.01);
Abstract

Embodiments of the present application provide a GRPC-based chip test method, a GRPC-based chip test apparatus, and a storage medium. The GRPC-based chip test method comprises: determining a number of to-be-tested chips that actually need to be tested among to-be-tested chips, and issuing a corresponding number of remote instrument call requests according to the number of to-be-tested chips that actually need to be tested; acquiring each of the remote instrument call requests based on a GRPC protocol; and sorting all the remote instrument call requests to form a request execution sequence table, and controlling the test instrument to sequentially test the to-be-tested chips that actually need to be tested according to the request execution sequence table.

Find Patent Forward Citations

Xie, Zeliang. (2026). Grpc-based chip test method, grpc-based chip test apparatus, and storage medium (U.S. Patent No. 12546822). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12546822

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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