The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 27, 2026

Filed:

Nov. 03, 2021
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Koichi Motoyama, Clifton Park, NY (US);

Chanro Park, Clifton Park, NY (US);

Kenneth Chun Kuen Cheng, Shatin, HK;

Hsueh-Chung Chen, Cohoes, NY (US);

Chih-Chao Yang, Glenmont, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/532 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53266 (2013.01); H01L 21/32139 (2013.01); H01L 21/76802 (2013.01); H01L 21/76837 (2013.01); H01L 21/76877 (2013.01); H01L 21/76885 (2013.01); H01L 23/5226 (2013.01);
Abstract

An interconnect structure is provided the includes a top electrically conductive via structure that is fully-aligned to a bottom electrically conductive line structure. The interconnect structure has a maximized contact area between the top electrically conductive via structure and the bottom electrically conductive line structure without metal fangs that are caused by over etching. The dielectric surface of the interconnect dielectric material layer that is adjacent to the top electrically conductive via structure is free of reactive ion etch (RIE) damage. Further, there is no line wiggling since the bottom electrically conductive line structure is formed by a substrative metal etch. Further, there is no via distortion since the via opening used to house the top electrically conductive via structure has a density and aspect ratio that are low enough to avoid via distortion.


Find Patent Forward Citations

Motoyama, Koichi. (2026). Fully-aligned and dielectric damage-less top via interconnect structure (U.S. Patent No. 12538785). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12538785

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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